Term | Definition |
---|---|
4-quadrant operation | The ability of a driver (on the Pin Card) to sink and source current at positive and negative voltages. |
6:2 / 3:2 multiplexing | (Mux system only) The relay multiplex scheme on the Hybrid32 Pin Card that allows each of the 32 driver/receiver channels (the :2) to be connected to one of 6 or 3 MINT pins (some channels drive 6 pins and some drive 3 pins. In the compatibility mode, the driver/receiver channels function as a HybridPlus Card with each channel MUXed to 9 pins. |
9:2 multiplexing | (Mux system only) The relay multiplex scheme on the HybridPlus Pin Card that allows each of the 16 driver/receiver channels (the :2) to be connected to one of 9 MINT pins. |
AC mains | The AC input lines to the PDU. |
AccessPlus Pin Card | (Mux system only) The AccessPlus Pin Card facilitates access to the testhead from external analog functional test equipment and provides 24 general-purpose relays for node-to-node connections. |
analog buses | The analog measurement lines on the ASRU Card. (See SIGLAB.) |
analog subsystem | The hardware used to perform analog testing. This includes the Module Control Card, ASRU Card, and pin cards. |
AnalogPlus Pin Card | (Mux system only) The AnalogPlus Pin Card provides the identical analog test capability as the HybridPlus Pin Card, but has no digital test capability. |
anti-static equipment | Equipment designed to prevent damage to electrical circuits from electrostatic discharge (ESD). Anti-static equipment includes floor and table mats, wrist and shoe straps, and special bags for storing and transporting ESD-sensitive devices. |
ASRU Card | The card containing the sources, detectors, and measuring operational amplifier (MOA) used for in-circuit measurements of analog components. |
ASRU speedup | A Digitized Measurement Circuit (DMC) on the ASRU Revision N Card can accelerate the test time for resistors, inductors, capacitors and resistor-like tests such as jumper and fuse tests. |
AUI | Attachment Unit Interface — A LAN port for connecting directly to an AUI cable or through an external transceiver to a twisted-pair, fiber optic, or thin or thick coaxial cable. |
AutoAdjust | A system function designed to ensure timing accuracy. An internal clock, time interval counter, and delay lines are used to de-skew system clocks, triggers, and pin electronics resources. |
AutoAdjust reference circuit | A circuit on the ASRU Card that provides precision reference voltages and temperature sensing for the AutoAdjust function and for calibration. |
autofile | A code, wired into the test fixture and read by the Module Control Card, that causes the appropriate board test program to be downloaded to the tester when the fixture is installed on the testhead. |
automatic board handler | (Mux system only) See EFS Board Handler. |
auxiliary source | A circuit on the ASRU Card that generates precision DC voltages for performing analog measurements. (See primary source.) |
backdrive | See overdriving. |
backplane | In the system module, the backplane is the Mother Card. It provides power to the daughter cards that plug into it and enables the cards to communicate with each other via address, data and control lines. |
balanced port | Balanced multiplexing ports on the Utility Card that can be used for connecting to differential signals equipment. |
BASIC | Acronym for Beginners All-purpose Symbolic Instruction Code. (See BT-BASIC.) |
bed-of-nails fixture | |
board handler | (Mux system only) See EFS Board Handler. |
boundary-scan | A standard (IEEE 1149.1-2001) for designing complex ICs, which specifies the incorporation of internal shift registers and control features to enhance testability. Boundary-scan technology is particularly valuable for testing complex devices such as microprocessors and ASICs, and where multi-chip and surface-mount packaging technologies are employed. (See InterconnectPlus and MCM.) IEEE 1149.6-2003 defines extensions to IEEE Std 1149.1 for the Boundary-Scan testing of advanced digital networks, which are not adequately addressed by existing standards, especially for those networks that are AC-coupled, differential, or both. |
Boundary-Scan Description Language (BSDL) | The Agilent software used to describe a boundary-scan component's boundary-scan characteristics. |
branch circuit | One or more AC outputs from the PDU that are protected by a circuit breaker or fuse. |
branch control | A feature of the PDU that allows one PDU to control or be controlled by another PDU of the same model. If the "Main" PDU is switched off (that is, its AC outputs are switched off), all down-stream "Branch" PDUs are also switched off simultaneously. |
branch PDU | A PDU that is both controlling and controlled by other PDUs. See branch control, main PDU, and sub-branch PDU. |
BRC | Bank, Row, Column: The BRC number (actually BRRCC) identifies the location of MINT pins in the testhead and probes in a two-bank fixture. |
BT-BASIC | Acronym for Board Test BASIC, an enhanced form of the BASIC programming language used for developing board test programs. |
calibration | A standardized maintenance procedure designed to ensure system accuracy. A calibrated and traceable digital multimeter is connected to the testhead via the Pin Verification Fixture and a calibrated and traceable counter is connected to the testhead via the clock port. System resistance, voltage references and frequency references are measured and reports are generated. |
card select circuit | The circuit on the Mother Card that generates card select (actually, slot select) signals to the daughter cards. |
cardcage | A sheet-metal assembly that physically supports PC mother and daughter cards. The module is a cardcage. (See backplane.) |
CAS | Column Address Strobe — A pulse used to refresh or maintain the data in a dynamic RAM. (See RAS.) |
cassette | (Mux system only) The Express Cassette Test Fixture, used in the Express Board Handler. |
cluster | A group of components on the board under test that are functionally tested together as though they were a single component. |
column | The vertical axis of the testhead's pin field. Each bank has 78 columns. (See row.) |
combinational tester | A board tester capable of performing both in-circuit and functional testing. |
combinatorial device | A digital IC whose output state depends only on the present state of its inputs. (See sequential device.) |
compression | (1) A technique in which a long series of vector patterns is reduced to shorter "CRCs" (see cyclical redundancy check (CRC)). (2) The technique of reducing the number of vectors that need to be stored by storing only unique vectors and using intelligent sequencing to apply them. |
confirmation | A subset of diagnostics, run by the operator to quickly verify that the system is operational. |
Control Card | The card that controls the module and controls the digital subsystem. |
control link | The cable between the System Card and the Module Control Card. |
control subsystem | The hardware involved in controlling the system. This includes the controller (computer) and I/O cards, the System Card, the Module Control Cards, and cables. |
controller | The computer that controls the testhead. |
Cover-Extend Technology (CET) | Extends the measurement capability of VTEP into powered testing by using the Boundary Scan output cell to test the connectors and socket signal pins. |
CPK | CPK or process capability index is an index which measures how close a process is running to its specification limits, relative to the natural variability of the process. A process is deemed capable, CPK >= 1, if the data sample is significantly large and reflects all contributors to process variation. Typically a target CPK >= 1.33 is established to guard band for smaller data samples. Test debug tools such as AutoDebug and Board Test Grader focus on measurement system performance excluding other contributors to process variation such as material, assembly and fixture contacts. In these cases, guard band CPK targets are CPK >= 5 or 10 to reflect the constraints. |
cradle | The mechanical structure that supports the testhead and allows it to be rotated to different positions. |
CRC | |
cyclical redundancy check (CRC) | A technique used for testing large digital devices whose responses to vector patterns are too complex to predict. A known-good device is sent a long series of patterns and its responses are collected and compressed to produce a unique code called a CRC. This learned CRC is then stored in the test for that device. On future runs of the test, the same series of patterns should produce the same CRC. If a different CRC results, the device is assumed to be defective. |
data logging circuit | The circuit on the Module Control Card that returns digital test failure data to the controller. |
daughter card | Any card that plugs into another card. |
debug circuit | The circuit on the Module Control Card that provides the capability of routing signals between the high-speed link, the Mother Card, and MINT pins on the Module Control Card. From the Mother Card, signals go to debug ports on the testhead. (See debug ports.) |
debug ports | The coaxial connectors on the side of the testhead that provide debug signals: Data, Clock, and Sync. (See debug circuit.) |
decoupling | |
de-skew | An AutoAdjust routine that compensates for timing errors in signals between modules by adjusting programmable delay lines in the digital pipeline. |
detector | The circuit on the ASRU Card used to measure analog AC and DC voltages and currents. External detectors can also be used via functional ports on the ASRU Card. (See source.) |
device library | |
device under test (DUT) | The PC board being tested. |
diagnostics | A software package used to check system configuration, verify performance, and isolate failures. |
digital device library | A set of pre-written digital device test files. The automatic program generator uses these files in generating the board test program. |
digital driver | See driver. |
digital receiver | See receiver. |
digital subsystem | The hardware used to perform digital testing. This includes the Module Control Card and pin cards. |
Digitized Measurement Circuit (DMC) | Microcontroller measurement circuitry on the ASRU Revision N Card that provides enhanced features, including ASRU speedup. |
DIN | Deutches Industrial Norm — A German standard for connectors. |
DMA | Acronym for Direct Memory Access, a scheme using an asynchronous bus and bus arbitration logic to allow different devices to control the bus for the most efficient data transfer. |
double-density | (Mux system only) The double-density HybridPlus and AnalogPlus Pin Cards have two times the number of driver/receiver resources as the original (single-density) versions of these cards. |
DRAM | |
driver | The circuit on the Pin Card that drives (or overdrives) the device under test to a digital state. |
driver hybrid | (Mux system only) A custom device on the single-density HybridPlus Pin Card that contains a driver's power amplifier, a circuit used to three-state the amplifier, and the input line to the receiver (to the driver/receiver chip). |
driver/receiver channel | A driver/receiver channel (on the hybrid pin card) that comprises one driver bus and one receiver bus from the same driver hybrid. |
driver/receiver chip | (Mux system only) A custom IC on the single-density HybridPlus Pin Card that provides part of the driver functionality (wave shaper and protection circuits) and all of the receiver functionality (comparators and pull-up/pull-down circuits). (See driver hybrid.) |
driver/receiver module | (Mux system only) A custom IC on the double-density HybridPlus Pin Card that provides the drive and receive capability for functional (non-overdrive) digital test capability. |
DTACK | Data Transfer ACKnowledge — A 68000 microprocessor signal which delays the bus cycle until the slowest device has responded. This technique is used to ensure data transfer integrity. |
dual-sided fixture | A test fixture capable of probing both sides of the board under test. |
dual-stage fixture | A test fixture with both long and short probes, capable of probing some nodes at the first stage (using long probes) and more nodes at the second stage (using both long and short probes). The first stage is used for functional testing and the second stage is used for in-circuit testing. |
dual-stage probe | The longer, spring-loaded probes used in dual-stage fixtures. |
dual-well fixture | A test fixture with two separate vacuum chambers, allowing one board to be tested while the other is being loaded. |
DUT | Device under test — The printed circuit board being tested. |
DUT power supply | The DC power supply that provides operating power to the device under test during functional testing. |
DUT power supply ports | The connectors on the ASRU Card that receive power from the DUT power supplies. |
DUTCLK | A clock signal, generated on the Module Control Card, which goes to the user clock pin (UCLK) to provide a clock for the DUT. |
DUTCLK generator | The circuit on the Module Control Card that generates DUTCLK. |
echo box | One of the System Card and Module Control Card self-test routines in which the SPU sends data to the card and reads it back to verify communication. |
EEPROM | Electrically-Erasable Programmable ROM — A non-volatile memory device on the ASRU Card that can be reprogrammed during calibration with correction constants used for AutoAdjust (see AutoAdjust). |
EFS Board Handler | (Mux system only) Bolted directly on the testhead, the Agilent EFS Board Handler automatically moves boards on and off the tester. It includes a conveyor and a unique test fixture (cassette) capable of dual-sided, dual-stage probing of surface-mount technology boards. |
EIA | Electronics Industries Association standard EIA-310-C. One EIA unit occupies 1.75 inches (44.5 mm) of vertical rack space. |
EISA | Extended Industry Standard Architecture — A joint effort by industry leaders to develop a 32-bit extension specification for Industry Standard Architecture (ISA) computers. |
electronics board | The electronics board is part of the VTEP/TestJet probe. It contains an amplifier which amplifies the test signal. |
electrostatic discharge (ESD) | The spontaneous discharge of electrons from a charged body (e.g., a person) to another body (e.g., a PC board). Great care must be taken to prevent damage to the ESD-sensitive assemblies in the system. |
Emergency Shutdown | See EMO. |
EMO | Emergency Off (Emergency Shutdown) — A safety feature that allows all AC outputs from the PDU to be immediately switched off in case of an emergency. On a Medalist ICT system, an Emergency Shutdown switch on the testhead is wired to the EMO terminals in the PDU. "Remote" Emergency Shutdown switches can be wired in series with the testhead's Emergency Shutdown switch; if any switch in opened, the system is shut down. |
enable/disable function | This refers to turning the DC outputs from the Module Power Unit (MPU) on (enabled) or off (disabled). The MPU can be disabled by the service disable switch on the testhead or by the thermal cutout switch on the Mother Card (if the module gets too hot). |
enhancement | An option used by some analog test statements which increases measurement accuracy by compensating for errors related to the MOA. |
ESD | |
event trigger circuit | The circuit on the Module Control Card that uses triggers from the DUT to trigger the system clock generator. |
fail | See pass/fail. |
fatal error | A signal generated by the pin card or the ASRU Card that causes the Module Control Card to halt testing. Fatal error can be invoked from an overvoltage or overpower condition. |
FCLK | Formatter clock, the signal that clocks the format chips. FCLK is generated by the system clock generator on the Module Control Card. |
field-replaceable unit | See FRU. |
FIFO | Acronym for first-in, first-out, a type of buffer between asynchronous digital devices or circuits. |
find pins | A test fixture verification program in which the operator probes a node on the board under test and receives information about that node, such as its node name and the devices connected to the node. |
fixture | A test fixture provides the interface between the testhead and the board under test. A special fixture, called the Pin Verification Fixture, is used for running system diagnostics and for calibration. |
fixture enable | A function which detects, via MINT pins on the Module Control Card, the presence of a fixture on the testhead. It also verifies that the fixture is correctly placed on the testhead. A bank 1 fixture must be placed on bank 1 of the testhead, and a bank 2 fixture must be placed on bank 2 of the testhead. If fixture enable is not asserted, the test program will not run. |
fixture interface pin | The spring-loaded pin (MINT pin) on the edge of all daughter cards that contacts the test fixture. |
fixture pull-down | The mechanical hardware (e.g., air cylinders and pull-down towers) used to pull a test fixture down onto the testhead so that its personality pins contact the MINT pins in the testhead. This hardware requires compressed air to operate. |
fixture verification | The process of verifying that a test fixture is correctly wired and is providing proper contacts to all nodes on the board under test. |
format chip | A custom IC used on the Pin Cards and the ASRU Card. On the Pin Card it converts vector instructions to ones and zeros for the drivers and compares actual and expected responses from the receivers. On the ASRU Card it synchronizes the analog subsystem to the digital subsystem. |
FRU | Field-replaceable unit (pronounced "frew") — Any electrical or mechanical part that is replaceable on-site. It may be a component such as a relay, a printed circuit board, or an entire instrument or mechanical assembly. |
functional test | An analog or digital test technique in which the board under test (or cluster) is powered up, stimuli are applied to its inputs, and responses are collected from its outputs. |
functional test ports | The coaxial ports on the ASRU Card through which external test equipment can be connected to the system. |
general-purpose relay (GP relay) | A relay on the Module Control Card that provides an isolated contact closure between adjacent MINT pins. The Module Control Card provides eight pairs of GP relay contacts. |
GPIB | A parallel interface that complies with IEEE Standard 488-1978, used to control test instruments. |
guarding | An analog in-circuit measurement technique that effectively isolates the device being measured from surrounding circuitry by canceling the effects of parallel current paths. |
guided probe | The hand-held probe at the testhead used for digital backtracing, debug, and fixture verification. |
heartbeat | When the testhead boot process is initiated, a program called "pmmonitor" is run. pmmonitor verifies the communication paths between the system controller and all Module Control Cards — via the System Card — every 60 seconds. This process is call the heartbeat. |
high-line shutdown | A feature of some PDUs in which the outputs of the PDU are automatically turned off if the AC input voltage rises above a predetermined level. This feature protects devices running off the branch AC circuits. |
high-speed link | A cable that passes from one Module Control Card to the next in a multi-module testhead. All modules are interconnected, forming a ring configuration. The link is used to synchronize the digital timing of the modules and to pass control of the digital subsystem between modules. |
hold coil | A coil in a "no voltage-trip" circuit breaker (used in all PDUs except the E1135) that allows the breaker contacts to remain closed only when the coil is energized, and causes the contacts to open immediately when the coil is de-energized. |
HP-HIL | Hewlett-Packard Human Interface Link — A serial interface in which several devices are connected in daisy-chain fashion. HP-HIL devices include the keyboard, mouse, bar code reader, etc. |
HP-IB | Hewlett-Packard Interface Bus — A parallel interface that complies with IEEE Standard 488-1978. (See GPIB.) |
hybrid pin card | (Mux system only) A generic term for any of the hybrid pin cards used in the Mux system. |
Hybrid32 Pin Card | (Mux system only) The Hybrid32 Pin Card provides digital drivers and receivers, with 6:2 and 3:2 multiplexing to MINT pins, and a relay multiplexer for interfacing to the analog measurement circuits on the ASRU Card. The Hybrid32 Pin Card provides 32 driver/receiver channels with overdrive (backdriving) capability. |
HybridPlus Pin Card | (Mux system only) The HybridPlus Pin Card provides digital drivers and receivers, with 9:2 multiplexing to MINT pins, and a relay multiplexer for interfacing to the analog measurement circuits on the ASRU Card. The HybridPlus Pin Card provides 16 driver/receiver channels with overdrive (backdriving) capability. The original HybridPlus card had only 8 channels. |
IEEE 802.3 | Institute of Electrical and Electronics Engineers LAN standard that defines the physical layer (layer 1) and part of the data link layer (layer 2) of the ISO OSI reference model for a carrier sense multiple access with collision detect LAN. |
In-Circuit Program Generator | See IPG. |
in-circuit test | An analog or digital test technique that measures the value or performance of a component on the board under test. (See guarding.) |
interconnect MUX | A relay multiplex circuit on the ASRU Card that connects the source, detector, and MOA in various measurement configurations to the SIGLAB buses. (See sub-MUX.) |
InterconnectPlus | Agilent software used for generating in-circuit tests of boundary-scan components. (See boundary-scan.) |
IPG | IPG (In-Circuit Program Generator) is the program that automatically generates the board test program based on board topology data entered by the programmer and a library of standard tests. |
iVTEP | intelligent Vectorless Test Extended Performance — Building on the strength of TestJet and VTEP, iVTEP can be used for ultra-small geometry packages, flip chips, as well as devices with minimal or no lead frames and heat spreaders. |
J lead | A lead on a surface-mount device that is rolled under the device in a 'J' shape. |
keep-alive | (1) The function in which the states on the pins of a device are maintained constant (kept alive) while the test is halted in order to download another set of test vectors into RAM. After downloading, testing is resumed. (2) The pulses applied to a dynamic RAM to maintain memory. |
LAN | Local Area Network — A general-purpose communications network that interconnects a variety of devices within a limited geographical area (e.g. a building or campus). |
LAN transceiver | (Also called a MAU) A device that provides the physical connection between a LAN cable and a LAN port. It also detects collisions. |
latch handle | The handle on the rear of the testhead that is used to unlatch the testhead so that it can be rotated, and to latch the testhead into the desired position. The latch handle comes with a key so that it can be locked for safety. |
LCA | |
lead frame | The metal conductors inside an IC, between the external pins and the internal bond wires to the die. |
LED | Light-Emitting Diode — A diode that emits visible light (in different colors). LEDs are used as status indicators on all cards in the system. |
library test | |
light curtain | (Mux system only) A safety feature in the EFS Board Handler consisting of a row of infrared light beams across the handler's entry and exit ports. If the beam is broken, all press and conveyor motions cease. |
line monitor and shutdown circuit | A circuit in some PDUs that monitors the AC input voltage and generates a warning or shuts off the AC outputs if the input voltage became too high or too low. |
Logic Cell Array (LCA) | An LCA is a type of field-programmable gate array. It consists of a large array of user-configurable blocks in a single chip. The functionality that is downloaded to the gate array is referred to as "circuitware" and allows the bit processors to be reconfigurable. STS interface LCAs convert serial data to parallel data for the STS processor and parallel data to serial data for the RBPs. They also multiplex and demultiplex serial data streams between the STS processors and the personality modules (PMs). |
low-line shutdown | The function of the line monitor and shutdown circuit in some PDUs that shuts off the AC outputs of the PDU if the input line voltage drops below a predetermined level. |
main PDU | The PDU that is controlling other down-stream PDUs, but is not controlled by another PDU. See branch control, branch PDU, and sub-branch PDU. |
mains | The AC input lines to the PDU. |
MAU | Medium Attachment Unit — Another term for a LAN transceiver, a device that connects a LAN cable to a LAN port. |
MCM | Multi-Chip Module — A high-density IC packaging technique in which more than one die is mounted on a single, multi-layer substrate. |
MINT pin | The spring-loaded pin on the edge of all daughter cards that contacts the test fixture. Also known as a fixture interface pin. |
MOA | Measuring Operational Amplifier — A special application of an operational amplifier, located on the ASRU Card, that facilitates analog measurements. (See interconnect MUX.) |
modem | MOdulator/DEModulator — A device used to connect a terminal or computer to a telephone line. On the other end of the telephone line is another modem, connected to a terminal or computer. |
module | The cardcage assembly in the testhead. From one to four modules can be installed in the testhead. |
Module Control Card | The card that controls the module and controls the digital subsystem. |
module fan control | In systems with older PDUs, the module fans are turned on and off by the testhead boot process. In systems with newer PDUs, the module fans are turned on and off when the outputs of the PDU are turned on and off; the boot process is not involved. |
Mother Card | The module's backplane, which provides address, data, control, and analog buses between daughter cards. |
MP/s | Megapatterns per second — A measure of digital test speed (vector application rate). |
MPU | Module Power Unit — A power supply that provides the DC operating voltages for a testhead module. |
MRC | Multiple Register Counter — A custom IC in the time interval counter circuit on the Module Control Card that generates start and stop pulses. |
mux card | A PC board in a test fixture used for Agilent VTEP/TestJet. VTEP/TestJet probes connect to the mux card, which amplifies, filters, and routes the test signals to the ASRU Card. Also known as a signal conditioner board. |
nail | A slang term for a fixture probe pin. (See bed-of-nails fixture.) |
Network Parameter Measurement (NPM) | Extends the measurement capability of VTEP for connectors and sockets. Allows opens on connector power and ground pins to be detected and diagnosed. |
nibble | A nibble is one-half of a byte (four bits). The MRC chip on the Module Control Card works with nibbles of data. |
node | (1) A location on the DUT (usually a solder pad) that provides an electrical connection between two or more components. (2) A directory location in a file system. (3) A system on a LAN. |
opens testing | A test that looks for open connections which should be closed (shorted). In PC board testing, it looks for open connections between a device or component pin and the PC board. In system Diagnostics, it looks for open relay contacts which should be closed in the system. (See shorts testing.) |
overdriving | A digital test technique in which a node on the device under test is forced (overdriven) to its opposite state by a short-duration, high-current pulse from a driver. This technique, also called "pulsing," effectively isolates the device from upstream circuitry. |
overhead chip | (Mux system only) The custom IC on the HybridPlus Pin Card that provides overhead functions such as opening relays, generating fatal error, generating chip selects, and controlling the voltage reference generator. |
overvoltage protection | Protection circuitry on all daughter cards that senses voltage on MINT pins, from the DUT, and invokes a fatal error. |
PAD | (1) Powered analog device - An analog device that is tested with an in-circuit test, but with DC power applied to it. (2) A small, non-coated copper area on a PC board to which a component lead or test point is soldered. |
PanelTest | A software product that facilitates test generation for panelized PC boards. Test development is performed on only one board in the panel and then automatically extrapolated to the rest of the boards, thereby minimizing test development time. When used with Agilent Throughput Multiplier, Agilent PanelTest enhances system throughput. (See Throughput Multiplier.) |
paperless repair | A board test and repair strategy in which test data is stored electronically instead of printed immediately on a repair "ticket" (from the strip printer). Data is retrieved based on the serial number read from a bar code label on the device under test. |
pass/fail | The result of comparing an actual response to the expected response. If they are equal, a pass is generated; if they are not equal, a fail is generated. |
pattern | The parallel set of digital test signals output from drivers. |
pattern application rate | The maximum rate at which the digital subsystem can supply patterns. |
PDU | |
personality pin | A special pin in the test fixture that connects a MINT pin in the testhead to a probe in the fixture. |
PFC | |
phase-synchronous detection | An analog measurement technique in which a detector on the ASRU Card measures both the real and imaginary components of a response from a reactive device. |
pin | (1) MINT pin (fixture interface pin) or driver/receiver pin. (2) Also refers to other pins if specifically stated (e.g., personality pin). |
pin electronics | The PC cards containing the electronic circuitry — digital driver and receivers and analog sources and detectors — that actually tests a board. The PC cards in the testhead connect to the device under test via spring-loaded "pins"; thus, "pin electronics". |
pin field | The surface area on the testhead where the "pins" are located. There are two pin fields: bank 1 and bank 2. |
pin protection plate | The spring-loaded, slotted metal plate that covers the pin field on each bank of the testhead. It provides mechanical and electrostatic discharge protection for the pins. |
pin RAM | The RAM on the Pin Card which contains unique vectors (test data). |
Polarity Check | An extension of Agilent TestJet that uses a smaller probe plate designed specifically for testing the polarity of electrolytic capacitors (see TestJet). |
Power Distribution Unit (PDU) | The assembly in the system that receives main AC line power and distributes it through branch circuits to the rest of the system. |
power factor correction | The traditional switching (switch-mode) power supply draws current from the AC line during the peaks of the input AC cycle. Input current is determined by the difference between the input voltage and the charge voltage on the input capacitor divided by the impedance of the rectifier diode and the charge path. This input current is not sinusoidal, but looks like a series of narrow peaks. The result is harmonic distortion. Power factor correction (PFC) uses the entire sine wave to charge the input capacitor, reducing the distortion and magnitude of the charging current. Reducing line currents is motivated by the customer's need to access a wide range of electrical services at the lowest possible currents. |
Power Monitoring Circuit (PMC) | A new safety feature that not only provides real time monitoring but also helps users to distinguish between a power supply failure or a digital test failure in the event of a failed digital test. The PMC also tries to prevent the back-drive current that can cause damage to ICs. |
power subsystem | The hardware used to provide and control AC and DC power throughout the system. This includes the PDU, MPU, System Card, Mother Card, and DUT DC power supplies. |
power supply decoupling | The function of the capacitors on the Mother Card to isolate the power supply voltages in the module from the MPU. |
powered analog device (PAD) | An analog device that is tested with an in-circuit test, but with DC power applied to it. |
preventive maintenance | Procedures performed on a regular basis to prevent failures and ensure that the system remains in good operating condition. |
primary source | The circuit on the ASRU Card that generates precision AC and DC voltage (including various AC waveforms). (See auxiliary source.) |
probe | A hand-held device on the testhead, used for digital backtracing, debug, and fixture verification. |
probe pin | A spring-loaded pin in the test fixture, which contacts the DUT. |
probe receptacle | The receptacle in the fixture's upper plate that holds the probe pin. |
pull-down towers | Mechanical devices on the testhead that engage the test fixture and pull it down so that its personality pins contact the MINT pins in the testhead. |
pulser power supplies | The +12VP and -10VP supplies on the Mother Card that provide the current required for overdriving. |
pulsing | See overdriving. |
Pushbutton Q-STATS | A standard software package that produces SQC reports from data gathered during testing and repairing of boards. |
quick press technology | (Mux system only) An accessory that sits on top of the testhead and handles mechanical test fixture. |
RAS | Acronym for Row Address Strobe, a pulse used to refresh or maintain the data in a dynamic RAM. (See CAS.) |
receiver | The circuit on the Pin Cards that receives digital signals from the device under test. It consists primarily of a dual-threshold comparator which compares received voltage levels against reference voltage levels. |
relay driver | A custom IC used to drive up to thirty-two 12-volt relays. |
relay multiplex circuit | (Mux system only) The circuit on the HybridPlus Pin Card that uses relays to connect driver/receiver channels to MINT pins and analog buses. |
remote emergency shutdown | A function that allows the testhead to be shut down from a remote switch, not located at the testhead. (See EMO.) |
remote sensing | In analog in-circuit testing, using SIGLAB's A, B, and L buses to sense source, detector, and ground levels. |
RGB | Acronym for Red-Green-Blue, the video signal cables to a color monitor. |
RISC | Reduced-Instruction-Set Computer — The architecture employed on the Module Control Card in which only four instructions are used to control vector sequencing. |
root | The first directory at the top of the file system. |
row | The horizontal axis of the testhead's pin field. Each bank has 23 rows (row 12 is missing). (See column.) |
SAFEGUARD | (Agilent SAFEGUARD In-circuit Analysis Package) An automatic function used to protect overdriven devices from damage during digital testing. |
safety disable | A function implemented by the System Card that disables vacuum to the test fixture if the fixture is incorrectly used. |
safety shroud | (1) The molded plastic assembly on the testhead surrounding the pin field that protects the operator from pinched fingers when installing a fixture on the testhead. (2) A user-designed safety cover on a test fixture that protects the operator from the hazards of electrical shock and exploding components. |
S-bus PM | (Mux system only) A 4-wire electrical ISDN interface standard. Each time slot on a serial PCM highway could be assigned to a particular channel on an S-bus interface. The S-bus PM is designed to simulate the operation of the S-bus interface. It can also emulate terminal equipment (TE) or a network terminator (e.g., line card). |
SCAT chip | The source control and timing chip, the custom IC on the ASRU Card used to control the source and detector circuits. |
SCLK | Sequencer clock, the signal that clocks the sequencer circuits. SCLK is generated by the system clock generator on the Module Control Card. |
SCR | Silicon Controlled Rectifier — A triggerable diode used in the line monitor and shutdown circuit in the PDU. |
SCSI | Small Computer System Interface — A popular and faster disk control bus. |
self-test | A software routine run on the System Card and Module Control Card which tests their circuits to verify functionality. Self-test is part of the boot. |
sensor plate | The sensor plate is part of the VTEP/TestJet probe. It is a thin PC board with a foil layer on the bottom (the surface of the foil layer is insulated). The sensor plate is cut to match the physical outline of the IC package. |
sequencer | A group of circuits on the Module Control Card that processes triggers from the DUT, generates system clocks, generates vector addresses, and logs data. |
sequential device | A digital device whose output states depend, in part, on its previous states; that is, a device that has memory. (See combinatorial device.) |
server | A controller that provides services, such as printer and plotter spooling, to the other devices on a LAN. |
shorts testing | A test that looks for closed (shorted) connections which should be open. In PC board testing, it looks for a short between traces on the PC board. In system Diagnostics, it looks for shorted relay contacts which should be open in the system. (See opens testing.) |
shroud | See safety shroud. |
shutdown | Shutting off all support bay and testhead power. An Emergency Shutdown switch on the testhead opens the main circuit breakers. |
SIGLAB | The measurement buses in the analog subsystem, used to connect the DUT to the ASRU Card's sources and detectors. SIGLAB stands for: S — (Source) Source output to the DUT I — (Input) Input to the MOA G — (Guard) Guards the source low output to the DUT L — (Low) Guards the low input to the MOA A — (Auxiliary A) Sense the S bus B — (Auxiliary B) Sense the I bus |
signal conditioner board | A PC board (mux card) in a test fixture used for Agilent VTEP/TestJet. VTEP/TestJet probes connect to the mux card, which amplifies, filters, and routes the test signals to the ASRU Card. |
SimPlate | The Agilent vacuum test fixture technology designed for use with Medalist ICT systems. |
skirt | See safety shroud. |
slew rate | The maximum rate of change of a driver's output under large-signal conditions, expressed in volts per microsecond (V/us). (Mux system only) The slew rate of the HybridPlus Pin Card's drivers is programmable. |
SMD | |
SMT | |
soft error | A signal generated by the ASRU Card that tells the Module Control Card that a non-serious temporary problem exists. |
source | See primary source and auxiliary source. |
SPU | System Processing Unit — The system controller (computer). |
status indicator | One or more light-emitting diodes that display a status code. |
strip printer | The printer at the testhead. |
stuck-at fault | A failure in which a digital signal is permanently held in one state (e.g., shorted to ground or +5 volts) by a defective device or circuit. |
sub-branch PDU | |
sub-MUX | A relay multiplex circuit on the ASRU Card that connects the SIGLAB buses from the interconnect MUX to the 'X' buses on the Mother Card. (See interconnect MUX.) |
subsystem | A group of hardware elements that work together to perform a particular function (e.g., power subsystem, control subsystem, analog subsystem, digital subsystem). |
support bay | The rack of equipment that supports the testhead by providing AC and DC power. It also contains optional test equipment. |
surface-mount device (SMD) | A component designed for surface-mount technology (see surface-mount technology (SMT)). |
surface-mount technology (SMT) | A printed circuit construction technique in which component leads are soldered only to pads on the surface of the board. The leads do not protrude through the board as in through-hole technology. Because of the "fine pitch" (close spacing) of the SMT ICs, in-circuit testing using bed-of-nails fixturing is becoming increasingly difficult. |
synchronous transmission | A synchronous transmission will transmit and receive at regular intervals. |
sync-to-clock | The ability of the system to synchronize the digital subsystem to a clock on the DUT. |
System Card | The card that controls communications between the system controller and the Control Cards in the modules, and controls AC and DC power to the testhead. |
system clock generator | The circuit on the Module Control Card that is clocked by TCLK and generates FCLK and SCLK. |
T/MV fixture | (Mux system only) See Training/Mechanical Verification fixture. |
TCLK | Tester CLocK — The main clock signal in a module, generated by the TCLK generator. |
TCLK generator | The circuit on the Module Control Card that generates the TCLK signal. |
temperature sensor | A circuit on the ASRU Card that monitors the temperature in the module and initiates a system shutdown or an AutoAdjust routine, depending on the absolute temperature or temperature change. |
test fixture | See fixture. |
testhead | The part of the system that interfaces with the board under test. The testhead contains the pin electronics. |
TestJet | The hardware and software that employ a unique test technique in testing for "opens" on PC boards. A low-level AC signal is applied to an IC pin and detected using a special probe plate on top of the device. The signal is coupled to the probe plate through the internal capacitance of the device. Absence of a signal means an open pin. This technique can also be applied to other devices like connectors and capacitors (see Polarity Check). |
TestJet subsystem | The standard testhead hardware (i.e., Module Control Card, ASRU Card, and Pin Card) and special fixturing hardware (i.e., TestJet probe and TestJet Signal Conditioner Board) that work together to test for opens on unpowered PC boards. |
ThinLAN | A LAN operating over a 5-mm-diameter coaxial cable, compatible with the IEEE 802.3 Type 10BASE2 standard. |
three-state | (1) The high-impedance state of the output of a digital driver, amplifier, or other device. (2) To cause a device to enter a three-state (neutral) condition. |
through-hole technology | A printed circuit construction technique in which component leads pass through and are soldered to plated holes in the PC board. |
Throughput Multiplier | A software product that allows all modules in the testhead to operate independently. This means that up to four separate PC boards can be tested simultaneously, thereby increasing throughput by a factor of four. Throughput Multiplier can only be used in conjunction with Agilent PanelTest software. (See PanelTest.) |
TIC | |
time interval counter (TIC) | A circuit on the Module Control Card that measures time interval, frequency, and period. It is used for measurement and AutoAdjust functions. |
Training/Mechanical Verification fixture | (Mux system only) The Agilent T/MV fixture is used for training board handler users and key operators and for board handler mechanical verification. |
Utility Card | An optional pin card that provides the following features: Support for external plug-in modules (flash or EEPROM programming or other functional circuits) Flexible power handling – capability to multiplex a power supply channel to power up to six individual boards on a panelized board. Additional control with eight sets of GP relays. In addition, the user can connect differential signals equipment through the balanced multiplexing port for testing purposes. |
UUT | Unit under test — The printed circuit board being tested; also called the DUT (device under test). |
vacuum fixture | See fixture. |
VCL | |
vector | A vector defines the pin data for a digital driver/receiver. The vector includes a set of parallel bits (0 or 1 states) sent to the inputs of a device, and a set of parallel bits expected in response from the outputs of the device. |
vector address | An address, generated by the vector address generator on the Module Control Card, which addresses data (vectors) in the pin RAM on the Pin Cards and data in the vector RAM on the ASRU Card. |
vector address bus | On the Mother Card's address bus (M_A[1:22]/), the lower thirteen bits (M_A[0:12]/) also serve as the vector address bus. Vector addresses are generated by the vector address generator. |
vector address generator | The circuit on the Module Control Card that generates vector addresses (see vector address and sequencer). |
Vector Control Language (VCL) | A language used to write digital tests. |
Vectorless Test EP | See VTEP. |
via | A plated through-hole in a PC board that makes connections between copper layers within the board. |
virtual terminal (VT) | A local area network term for a terminal capable of logging in to one system through another. |
voltage reference generator | The circuit on the Pin Cards that provides the DC voltages (called "VRefs") used to program driver/receiver levels. |
VRef | A voltage produced by the voltage reference generator. |
VTEP | Agilent Vectorless Test EP (VTEP) tests for manufacturing defects such as open connections, missing devices, and improperly positioned (skewed) devices. TestJet is the older version of VTEP. |
VTEP subsystem | The standard testhead hardware (i.e., Module Control Card, ASRU Card, and Pin Card) and special fixturing hardware (i.e., VTEP probe and VTEP Signal Conditioner Board) that work together to test for opens on unpowered PC boards. |
VTEP v2.0 Powered! | The VTEP v2.0 Powered! test suite comprises: The original VTEP engine – With 4x better sensitivity and 5x better standard deviation iVTEP – For testing ultra-small packages (e.g micro-BGAs, flip-chips) Network Parameter Measurement (NPM) – For testing power and ground pins (essential for HSSP) Cover-Extend Technology (CET) – The latest addition to the test suite which targets limited-access PCBAs |
VXIbus | VMEbus Extensions for Instrumentation — A standard that defines card sizes, connectors, and device communication protocol that is compatible with IEEE-488. (VMEbus is an older standard.) |
wireless fixture | A test fixture that employs a printed circuit board instead of wires to make connections between pins and probes. Wireless fixtures generally have better signal fidelity than wired fixtures. |
wire-wrapping | A solderless connecting scheme in which a wire is wrapped around a square pin. Wire-wrapping is thought to be electrically and mechanically superior to soldered connections. |
workstation | A controller used for test development instead of controlling a testhead. |
X buses | The analog buses on the Mother Card which carry signals between the ASRU Card and the Pin Cards. |
XG-50 fixture | (Mux system only) A test fixture that uses an Extended Ground (XG) matrix which provides 50-megahertz bandwidth for doing 20-megapattern-per-second digital testing. |
X-terminal | (Mux system only) A terminal or personal computer used as a diskless test development station. The X-terminal provides X-windows capability. |
8.10 Some of the most frequently used BT-BASIC commands used are: msi Changes default working directory. Mass storage is Same as “msi” cat Catalogs (list)the node names in the specified directory. get Brings the contents of a file into the system workspace. ...
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